Heavily loaded condition may lead to power system instability either due to sudden increase in load or tripping of adjacent transmission line. When load increases, the apparent impedance decreases accordingly depending on the nature of load, similar instances can be observed during short circuit event [1, 2]. In addition, the system may also experience voltage instability originating from high power flow through the transmission line during fault and line outage condition. Hence, the ability for the system to quickly indicate possible voltage instability via fast voltage indicator is important in mitigating voltage instability from being further aggravated. Undesirable disconnection of transmission lines should also be avoided during voltage instability, while load encroachment possibilities into protective zone may cause unnecessary line isolation, which would result in cascading tripping [3, 4]. This paper presents the correlation between the apparent impedance calculated from different contingency scenario and the derived voltage indicator applied to the IEEE 30 Bus Test System.