Voltage balancing in DC link capacitor for seven level cascaded multilevel inverter

A. F. Jabbar, Muhamad Mansor

Research output: Contribution to conferencePaper

6 Citations (Scopus)

Abstract

Multilevel inverters enables implementation of high-power-medium-voltage applications using smaller rated devices resulting to cheaper and compact design. Currently, researchers are interested in developing distributed generation (DG) with multilevel topology that produces not just active power demands, but also incorporated with custom power capabilities for power quality improvement. However, multilevel inverters are susceptive to voltage unbalance at the DC link capacitor which affects the output voltages. For this reason, a voltage balancing method is presented for a seven level cascaded multilevel inverter using phase-shifted carrier PWM (PSCPWM). This method is base on modifying the switching state without any external circuit.

Original languageEnglish
Pages323-326
Number of pages4
DOIs
Publication statusPublished - 01 Jan 2013
Event2013 IEEE Conference on Clean Energy and Technology, CEAT 2013 - Langkawi, Malaysia
Duration: 18 Nov 201320 Nov 2013

Other

Other2013 IEEE Conference on Clean Energy and Technology, CEAT 2013
CountryMalaysia
CityLangkawi
Period18/11/1320/11/13

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All Science Journal Classification (ASJC) codes

  • Energy Engineering and Power Technology
  • Fuel Technology

Cite this

Jabbar, A. F., & Mansor, M. (2013). Voltage balancing in DC link capacitor for seven level cascaded multilevel inverter. 323-326. Paper presented at 2013 IEEE Conference on Clean Energy and Technology, CEAT 2013, Langkawi, Malaysia. https://doi.org/10.1109/CEAT.2013.6775649