VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA

Emilliano, Chandan Kumar Chakrabarty, Ahmad Basri Abdul Ghani, Agileswari Ramasamy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper is purely a model to implement Partial Discharge (PD) detection in FPGA technology and then implement the VHDL modeled in FPGA technology for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe using 3GHz ADC (ADC083000RB-Reference Board) and impulse generator. Partial discharge (PD) is a well known phenomenon that causes insulation degradation in cross linked polyethylene (XLPE) power cable and ultimately it will cause insulation failure. The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. The impulse signals at the input data have very fast rise time in the field can have a bandwith of about 200 - 600 MHz. The output signals of the combination 4 blocks (peak detector block, 64 bit BCD counter with reset block, reset automatic block and 64 bit BCD counter) is processed using reset automatic block and 64 bit latch block for keep output data in LCD to constant when the 64 bit BCD counter block is reset and return to zero again until update new data again. The combination of all blocks of PD detection circuit system is tested by using Xilinx ISE simulator and implemented by ISE Xilinx Synthesized Technology and Xilinx ISE Implement Design. The distance resolution measurement of magnetic field is shown in this paper.

Original languageEnglish
Title of host publicationProceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems
Subtitle of host publicationIssues and Prospects for Asia, ICUE 2011
DOIs
Publication statusPublished - 2012
Event2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011 - Pattaya City, Thailand
Duration: 28 Sep 201130 Sep 2011

Other

Other2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011
CountryThailand
CityPattaya City
Period28/09/1130/09/11

Fingerprint

Computer hardware description languages
Partial discharges
Field programmable gate arrays (FPGA)
Networks (circuits)
Computer programming
Insulation
Simulators
Underground cables
Liquid crystal displays
Integrated circuits
Polyethylenes
Cables
Magnetic fields
Detectors
Degradation
Electric potential

All Science Journal Classification (ASJC) codes

  • Energy Engineering and Power Technology
  • Fuel Technology

Cite this

Emilliano, Kumar Chakrabarty, C., Ghani, A. B. A., & Ramasamy, A. (2012). VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA. In Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011 [6497711] https://doi.org/10.1109/ICUEPES.2011.6497711
Emilliano, ; Kumar Chakrabarty, Chandan ; Ghani, Ahmad Basri Abdul ; Ramasamy, Agileswari. / VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA. Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011. 2012.
@inproceedings{5abad60164f749c885d84379ad492297,
title = "VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA",
abstract = "This paper is purely a model to implement Partial Discharge (PD) detection in FPGA technology and then implement the VHDL modeled in FPGA technology for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe using 3GHz ADC (ADC083000RB-Reference Board) and impulse generator. Partial discharge (PD) is a well known phenomenon that causes insulation degradation in cross linked polyethylene (XLPE) power cable and ultimately it will cause insulation failure. The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. The impulse signals at the input data have very fast rise time in the field can have a bandwith of about 200 - 600 MHz. The output signals of the combination 4 blocks (peak detector block, 64 bit BCD counter with reset block, reset automatic block and 64 bit BCD counter) is processed using reset automatic block and 64 bit latch block for keep output data in LCD to constant when the 64 bit BCD counter block is reset and return to zero again until update new data again. The combination of all blocks of PD detection circuit system is tested by using Xilinx ISE simulator and implemented by ISE Xilinx Synthesized Technology and Xilinx ISE Implement Design. The distance resolution measurement of magnetic field is shown in this paper.",
author = "Emilliano and {Kumar Chakrabarty}, Chandan and Ghani, {Ahmad Basri Abdul} and Agileswari Ramasamy",
year = "2012",
doi = "10.1109/ICUEPES.2011.6497711",
language = "English",
isbn = "9781467360081",
booktitle = "Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems",

}

Emilliano, , Kumar Chakrabarty, C, Ghani, ABA & Ramasamy, A 2012, VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA. in Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011., 6497711, 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011, Pattaya City, Thailand, 28/09/11. https://doi.org/10.1109/ICUEPES.2011.6497711

VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA. / Emilliano, ; Kumar Chakrabarty, Chandan; Ghani, Ahmad Basri Abdul; Ramasamy, Agileswari.

Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011. 2012. 6497711.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA

AU - Emilliano,

AU - Kumar Chakrabarty, Chandan

AU - Ghani, Ahmad Basri Abdul

AU - Ramasamy, Agileswari

PY - 2012

Y1 - 2012

N2 - This paper is purely a model to implement Partial Discharge (PD) detection in FPGA technology and then implement the VHDL modeled in FPGA technology for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe using 3GHz ADC (ADC083000RB-Reference Board) and impulse generator. Partial discharge (PD) is a well known phenomenon that causes insulation degradation in cross linked polyethylene (XLPE) power cable and ultimately it will cause insulation failure. The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. The impulse signals at the input data have very fast rise time in the field can have a bandwith of about 200 - 600 MHz. The output signals of the combination 4 blocks (peak detector block, 64 bit BCD counter with reset block, reset automatic block and 64 bit BCD counter) is processed using reset automatic block and 64 bit latch block for keep output data in LCD to constant when the 64 bit BCD counter block is reset and return to zero again until update new data again. The combination of all blocks of PD detection circuit system is tested by using Xilinx ISE simulator and implemented by ISE Xilinx Synthesized Technology and Xilinx ISE Implement Design. The distance resolution measurement of magnetic field is shown in this paper.

AB - This paper is purely a model to implement Partial Discharge (PD) detection in FPGA technology and then implement the VHDL modeled in FPGA technology for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe using 3GHz ADC (ADC083000RB-Reference Board) and impulse generator. Partial discharge (PD) is a well known phenomenon that causes insulation degradation in cross linked polyethylene (XLPE) power cable and ultimately it will cause insulation failure. The research shall involve ISE Simulator version 10.1i (Xilinx) and ISE Xilinx Synthesized Technology (XST) using Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA-Xilinx Virtex 5 ML501 Board) for the detection and counting of partial discharge signals in high voltage underground cable. The impulse signals at the input data have very fast rise time in the field can have a bandwith of about 200 - 600 MHz. The output signals of the combination 4 blocks (peak detector block, 64 bit BCD counter with reset block, reset automatic block and 64 bit BCD counter) is processed using reset automatic block and 64 bit latch block for keep output data in LCD to constant when the 64 bit BCD counter block is reset and return to zero again until update new data again. The combination of all blocks of PD detection circuit system is tested by using Xilinx ISE simulator and implemented by ISE Xilinx Synthesized Technology and Xilinx ISE Implement Design. The distance resolution measurement of magnetic field is shown in this paper.

UR - http://www.scopus.com/inward/record.url?scp=84876858995&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84876858995&partnerID=8YFLogxK

U2 - 10.1109/ICUEPES.2011.6497711

DO - 10.1109/ICUEPES.2011.6497711

M3 - Conference contribution

SN - 9781467360081

BT - Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems

ER -

Emilliano , Kumar Chakrabarty C, Ghani ABA, Ramasamy A. VHDL implementation for measurement of the distance test distribution pattern of the Tri-Axial magnetic probe for the PD detection circuit system by using 3 GHz ADC and FPGA. In Proceedings of the 2011 International Conference and Utility Exhibition on Power and Energy Systems: Issues and Prospects for Asia, ICUE 2011. 2012. 6497711 https://doi.org/10.1109/ICUEPES.2011.6497711