TCAD Simulation of STI stress effect on active length for 130nm technology

Wan Rosmaria Wan Ahmad, Albert Victor Kordesch, Ibrahim Ahmad, Philip Tan Beow Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In this paper we investigated the compressive stress in the channel induced by shallow trench isolation (STI) for different active length (Sa). We simulate both PMOS and NMOS for 130nm gate length with five active lengths (Sa=0.34, 0.5, 0.8, 1.0, 5.0um) by using TCAD simulation and compare to experimental data from wafers fabricated using Silterra's 130nm Technology. When the Sa is decreasing, Sxx stress becomes more compressive for both P- and N- MOS while the Syy component becomes more tensile, causing hole mobility improvement in PMOS and electron mobility degradation in NMOS. When Sa decreases from 5um to 0.34um, the Idsat for NMOS is degraded 6.6% and Idsat for PMOS is increased 6%. This means narrower Sa will increases hole mobility performance in p-channel but degrade the electron mobility in n-channel. These results agree with the experimental data.

Original languageEnglish
Title of host publicationICSE 2006
Subtitle of host publication2006 IEEE International Conference on Semiconductor Electronics, Proceedings
Pages1038-1041
Number of pages4
DOIs
Publication statusPublished - 2006
Event2006 IEEE International Conference on Semiconductor Electronics, ICSE 2006 - Kuala Lumpur, Malaysia
Duration: 29 Nov 200601 Dec 2006

Other

Other2006 IEEE International Conference on Semiconductor Electronics, ICSE 2006
CountryMalaysia
CityKuala Lumpur
Period29/11/0601/12/06

Fingerprint

Hole mobility
Electron mobility
Compressive stress
Degradation

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Ahmad, W. R. W., Kordesch, A. V., Ahmad, I., & Yew, P. T. B. (2006). TCAD Simulation of STI stress effect on active length for 130nm technology. In ICSE 2006: 2006 IEEE International Conference on Semiconductor Electronics, Proceedings (pp. 1038-1041). [4266781] https://doi.org/10.1109/SMELEC.2006.380798
Ahmad, Wan Rosmaria Wan ; Kordesch, Albert Victor ; Ahmad, Ibrahim ; Yew, Philip Tan Beow. / TCAD Simulation of STI stress effect on active length for 130nm technology. ICSE 2006: 2006 IEEE International Conference on Semiconductor Electronics, Proceedings. 2006. pp. 1038-1041
@inproceedings{ccc4125969914be488ae5dc865f9fc0d,
title = "TCAD Simulation of STI stress effect on active length for 130nm technology",
abstract = "In this paper we investigated the compressive stress in the channel induced by shallow trench isolation (STI) for different active length (Sa). We simulate both PMOS and NMOS for 130nm gate length with five active lengths (Sa=0.34, 0.5, 0.8, 1.0, 5.0um) by using TCAD simulation and compare to experimental data from wafers fabricated using Silterra's 130nm Technology. When the Sa is decreasing, Sxx stress becomes more compressive for both P- and N- MOS while the Syy component becomes more tensile, causing hole mobility improvement in PMOS and electron mobility degradation in NMOS. When Sa decreases from 5um to 0.34um, the Idsat for NMOS is degraded 6.6{\%} and Idsat for PMOS is increased 6{\%}. This means narrower Sa will increases hole mobility performance in p-channel but degrade the electron mobility in n-channel. These results agree with the experimental data.",
author = "Ahmad, {Wan Rosmaria Wan} and Kordesch, {Albert Victor} and Ibrahim Ahmad and Yew, {Philip Tan Beow}",
year = "2006",
doi = "10.1109/SMELEC.2006.380798",
language = "English",
isbn = "0780397312",
pages = "1038--1041",
booktitle = "ICSE 2006",

}

Ahmad, WRW, Kordesch, AV, Ahmad, I & Yew, PTB 2006, TCAD Simulation of STI stress effect on active length for 130nm technology. in ICSE 2006: 2006 IEEE International Conference on Semiconductor Electronics, Proceedings., 4266781, pp. 1038-1041, 2006 IEEE International Conference on Semiconductor Electronics, ICSE 2006, Kuala Lumpur, Malaysia, 29/11/06. https://doi.org/10.1109/SMELEC.2006.380798

TCAD Simulation of STI stress effect on active length for 130nm technology. / Ahmad, Wan Rosmaria Wan; Kordesch, Albert Victor; Ahmad, Ibrahim; Yew, Philip Tan Beow.

ICSE 2006: 2006 IEEE International Conference on Semiconductor Electronics, Proceedings. 2006. p. 1038-1041 4266781.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - TCAD Simulation of STI stress effect on active length for 130nm technology

AU - Ahmad, Wan Rosmaria Wan

AU - Kordesch, Albert Victor

AU - Ahmad, Ibrahim

AU - Yew, Philip Tan Beow

PY - 2006

Y1 - 2006

N2 - In this paper we investigated the compressive stress in the channel induced by shallow trench isolation (STI) for different active length (Sa). We simulate both PMOS and NMOS for 130nm gate length with five active lengths (Sa=0.34, 0.5, 0.8, 1.0, 5.0um) by using TCAD simulation and compare to experimental data from wafers fabricated using Silterra's 130nm Technology. When the Sa is decreasing, Sxx stress becomes more compressive for both P- and N- MOS while the Syy component becomes more tensile, causing hole mobility improvement in PMOS and electron mobility degradation in NMOS. When Sa decreases from 5um to 0.34um, the Idsat for NMOS is degraded 6.6% and Idsat for PMOS is increased 6%. This means narrower Sa will increases hole mobility performance in p-channel but degrade the electron mobility in n-channel. These results agree with the experimental data.

AB - In this paper we investigated the compressive stress in the channel induced by shallow trench isolation (STI) for different active length (Sa). We simulate both PMOS and NMOS for 130nm gate length with five active lengths (Sa=0.34, 0.5, 0.8, 1.0, 5.0um) by using TCAD simulation and compare to experimental data from wafers fabricated using Silterra's 130nm Technology. When the Sa is decreasing, Sxx stress becomes more compressive for both P- and N- MOS while the Syy component becomes more tensile, causing hole mobility improvement in PMOS and electron mobility degradation in NMOS. When Sa decreases from 5um to 0.34um, the Idsat for NMOS is degraded 6.6% and Idsat for PMOS is increased 6%. This means narrower Sa will increases hole mobility performance in p-channel but degrade the electron mobility in n-channel. These results agree with the experimental data.

UR - http://www.scopus.com/inward/record.url?scp=35148814039&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=35148814039&partnerID=8YFLogxK

U2 - 10.1109/SMELEC.2006.380798

DO - 10.1109/SMELEC.2006.380798

M3 - Conference contribution

SN - 0780397312

SN - 9780780397316

SP - 1038

EP - 1041

BT - ICSE 2006

ER -

Ahmad WRW, Kordesch AV, Ahmad I, Yew PTB. TCAD Simulation of STI stress effect on active length for 130nm technology. In ICSE 2006: 2006 IEEE International Conference on Semiconductor Electronics, Proceedings. 2006. p. 1038-1041. 4266781 https://doi.org/10.1109/SMELEC.2006.380798