Synthesis and optimization of analog VLSI filters from VHDL-AMS parse trees (summary)

Fazrena A. Hamid, Tom J. Kazmierski

Research output: Contribution to journalConference article

Abstract

This contribution presents a new technique for synthesis and optimization of VLSI bandpass filter in Gigahertz frequency range. We present synthesis examples of silicon LC filters and fourth -order RC filters using positive - feedback bootstrapping circuits. The filter characteristics are defined using a high -level behavioral description in VHDL-AMS. The architectural synthesis is done by the identification of synthesizable constructs from a VHDL - AMS parse tree. The netlists produced by the architectural synthesizer is subsequently subjected to parametric optimization, using HSPICE simulations in the optimization loop, for improved performance.

Original languageEnglish
Pages (from-to)I/749-I/752
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
Publication statusPublished - 01 Jan 2002
Event2002 IEEE International Symposium on Circuits and Systems - Phoenix, AZ, United States
Duration: 26 May 200229 May 2002

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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