FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection

Emilliano, Chandan Kumar Chakrabarty, Ahmad Basri, Agileswari Ramasamy, Lee Chia Ping

Research output: Contribution to journalArticle

Abstract

Currently, FPGA (Field Programmable Gate Array) technology is being widely used for accelerator control owing to its fast digital processing capability. This paper is purely a model to determine the design circuit to implement Partial Discharge (PD) detection in FPGA technology. The research shall involve ISE Simulator version 9.2i (Xilinx) and Very high integrated circuit Hardware Description Language (VHDL) programming to evaluate the use of Field Programming Gate Array (FPGA) for the detection and counting of partial discharge signals in underground cable. The impulse signals at the input data have very fast rise time in the range of 1 ns to 2 ns.

Original languageEnglish
Pages (from-to)29-37
Number of pages9
JournalInternetworking Indonesia Journal
Volume2
Issue number1
Publication statusPublished - Mar 2010

Fingerprint

Computer hardware description languages
Partial discharges
Computer programming
Field programmable gate arrays (FPGA)
Data acquisition
Underground cables
Digital signal processing
Particle accelerators
Integrated circuits
Simulators
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Cite this

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FPGA simulation of AD converter by using Giga Hertz speed data acquisition for partial discharge detection. / Emilliano, ; Kumar Chakrabarty, Chandan; Basri, Ahmad; Ramasamy, Agileswari; Ping, Lee Chia.

In: Internetworking Indonesia Journal, Vol. 2, No. 1, 03.2010, p. 29-37.

Research output: Contribution to journalArticle

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