Complex multilevel converter, such as Modular Multilevel Converter (MMC) normally employs more than hundreds units of Power Electronics Building Blocks (PEBBs). To simplify the wiring system within the MMC, high speed internal ring network has been suggested. In ring network, all data will be transmitted using communication wire such as fiber optic. Sensing measurements and gating signals must be packed accordingly before transmitting. Thus each PEBB must own a microprocessor to process the input/output data. This paper will introduce a slave communication controller design using an FPGA. The proposed controller is capable to extract the receiving data for generating appropriate gate signal to trigger the power semiconductor. In addition, it will concatenate two sensor measurements together with some status bits as transmitting data payload. The proposed controller is validated using a small scale MMC prototype. The experimental results are enclosed and discussed.