Designing and optimizing digital circuit using FPSGA and DH

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper is presents the analysis of designing and optimizing digital circuit structure using Finite Persisting Sphere Genetic Algorithm (FPSGA) and (Double Helix) DH representation. The design is involved 4 Input and 1 Output of digital circuit with 6 min terms. The resulted circuit is verified using XILINX ISE Design Suite 13.2. The result obtained shows that the circuit is function and able to operate with minimum number of gates.

Original languageEnglish
Title of host publicationProceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013
Pages167-171
Number of pages5
DOIs
Publication statusPublished - 28 Aug 2013
Event2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013 - Langkawi, Malaysia
Duration: 03 Jun 201304 Jun 2013

Publication series

NameProceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013

Other

Other2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013
CountryMalaysia
CityLangkawi
Period03/06/1304/06/13

Fingerprint

Digital circuits
Genetic algorithms
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Energy Engineering and Power Technology
  • Fuel Technology

Cite this

Kamil, K., Chong, K. H., & K. Raveendran, S. (2013). Designing and optimizing digital circuit using FPSGA and DH. In Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013 (pp. 167-171). [6564536] (Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013). https://doi.org/10.1109/PEOCO.2013.6564536
Kamil, Karmila ; Chong, Kok Hen ; K. Raveendran, Shangari. / Designing and optimizing digital circuit using FPSGA and DH. Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013. 2013. pp. 167-171 (Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013).
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Kamil, K, Chong, KH & K. Raveendran, S 2013, Designing and optimizing digital circuit using FPSGA and DH. in Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013., 6564536, Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013, pp. 167-171, 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013, Langkawi, Malaysia, 03/06/13. https://doi.org/10.1109/PEOCO.2013.6564536

Designing and optimizing digital circuit using FPSGA and DH. / Kamil, Karmila; Chong, Kok Hen; K. Raveendran, Shangari.

Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013. 2013. p. 167-171 6564536 (Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Kamil K, Chong KH, K. Raveendran S. Designing and optimizing digital circuit using FPSGA and DH. In Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013. 2013. p. 167-171. 6564536. (Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference, PEOCO 2013). https://doi.org/10.1109/PEOCO.2013.6564536