Design of low power and low phase noise current starved ring oscillator for RFID tag EEPROM

Labonnah Farzana Rahman, Mamun Bin Ibne Reaz, Mohammad Marufuzzaman, Lariyah Mohd Sidek

Research output: Contribution to journalArticle

Abstract

Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 μW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM.

Original languageEnglish
Pages (from-to)19-23
Number of pages5
JournalInformacije MIDEM
Volume49
Issue number1
DOIs
Publication statusPublished - 01 Jan 2019

Fingerprint

PROM
Phase noise
Radio frequency identification (RFID)
Energy dissipation
Clocks
Electric potential
Data storage equipment
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Rahman, Labonnah Farzana ; Reaz, Mamun Bin Ibne ; Marufuzzaman, Mohammad ; Mohd Sidek, Lariyah. / Design of low power and low phase noise current starved ring oscillator for RFID tag EEPROM. In: Informacije MIDEM. 2019 ; Vol. 49, No. 1. pp. 19-23.
@article{a44d6ebb372a4ba182faed9a8505dd98,
title = "Design of low power and low phase noise current starved ring oscillator for RFID tag EEPROM",
abstract = "Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 μW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM.",
author = "Rahman, {Labonnah Farzana} and Reaz, {Mamun Bin Ibne} and Mohammad Marufuzzaman and {Mohd Sidek}, Lariyah",
year = "2019",
month = "1",
day = "1",
doi = "10.33180/InfMIDEM2019.103",
language = "English",
volume = "49",
pages = "19--23",
journal = "Informacije MIDEM",
issn = "0352-9045",
publisher = "Society for Microelectronics, Electric Components and Materials",
number = "1",

}

Design of low power and low phase noise current starved ring oscillator for RFID tag EEPROM. / Rahman, Labonnah Farzana; Reaz, Mamun Bin Ibne; Marufuzzaman, Mohammad; Mohd Sidek, Lariyah.

In: Informacije MIDEM, Vol. 49, No. 1, 01.01.2019, p. 19-23.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Design of low power and low phase noise current starved ring oscillator for RFID tag EEPROM

AU - Rahman, Labonnah Farzana

AU - Reaz, Mamun Bin Ibne

AU - Marufuzzaman, Mohammad

AU - Mohd Sidek, Lariyah

PY - 2019/1/1

Y1 - 2019/1/1

N2 - Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 μW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM.

AB - Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 μW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM.

UR - http://www.scopus.com/inward/record.url?scp=85070670037&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85070670037&partnerID=8YFLogxK

U2 - 10.33180/InfMIDEM2019.103

DO - 10.33180/InfMIDEM2019.103

M3 - Article

VL - 49

SP - 19

EP - 23

JO - Informacije MIDEM

JF - Informacije MIDEM

SN - 0352-9045

IS - 1

ER -