Design of a reconfigurable computing platform

Justin John Papu, Hang See Ong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper describes a design of a reconfigurable computing platform (RCP) based on the Intel Xeon general purpose processor and the Nallatech BenNUEY-PCI-4E field programmable gate array (FPGA) motherboard. The RCP is built to allow users with little or no knowledge of hardware design to program high performance computing applications that utilizes FPGA as the coprocessor. The RCP utilizes Impulse CoDeveloper which is an electronic system level (ESL) design tool that compiles sequential applications/algorithms in C to synthesizable HDL. A customized platform support package (PSP) was developed within the Impulse CoDeveloper environment to enable the Impulse tools to automatically generate the HDL files and C source codes with supported hardware and software interfaces that is targeted for the RCP. The PSP also automates the synthesis and implementation process integration to generate the bitstream file from the Xilinx ISE foundation tool. Finally, the RCP is made accessible within a LAN with the FUSE TCP/IP Server tool.

Original languageEnglish
Title of host publication2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
Pages148-153
Number of pages6
DOIs
Publication statusPublished - 12 Nov 2009
Event2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009 - Kuala Lumpur, Malaysia
Duration: 25 Jul 200926 Jul 2009

Publication series

Name2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009

Other

Other2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
CountryMalaysia
CityKuala Lumpur
Period25/07/0926/07/09

Fingerprint

Field programmable gate arrays (FPGA)
Hardware
Local area networks
Servers
Coprocessor

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Information Systems
  • Industrial and Manufacturing Engineering

Cite this

Papu, J. J., & Ong, H. S. (2009). Design of a reconfigurable computing platform. In 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009 (pp. 148-153). [5224224] (2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009). https://doi.org/10.1109/CITISIA.2009.5224224
Papu, Justin John ; Ong, Hang See. / Design of a reconfigurable computing platform. 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009. 2009. pp. 148-153 (2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009).
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Papu, JJ & Ong, HS 2009, Design of a reconfigurable computing platform. in 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009., 5224224, 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009, pp. 148-153, 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009, Kuala Lumpur, Malaysia, 25/07/09. https://doi.org/10.1109/CITISIA.2009.5224224

Design of a reconfigurable computing platform. / Papu, Justin John; Ong, Hang See.

2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009. 2009. p. 148-153 5224224 (2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Papu JJ, Ong HS. Design of a reconfigurable computing platform. In 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009. 2009. p. 148-153. 5224224. (2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009). https://doi.org/10.1109/CITISIA.2009.5224224