Configurations of memristor-based APUF for improved performance

Julius Han Loong Teo, Noor Alia Noor Hashim, Azrul Ghazali, Fazrena Azlee Hamid

Research output: Contribution to journalArticle

1 Citation (Scopus)


The memristor-based arbiter PUF (APUF) has great potential to be used for hardware security purposes. Its advantage is in its challenge-dependent delays, which cannot be modeled by machine learning algorithms. In this paper, further improvement is proposed, which are circuit configurations to the memristor-based APUF. Two configuration aspects were introduced namely varying the number of memristor per transistor, and the number of challenge and response bits. The purpose of the configurations is to introduce additional variation to the PUF, thereby improve PUF performance in terms of uniqueness, uniformity, and bit-aliasing; as well as resistance against support vector machine (SVM). Monte Carlo simulations were carried out on 180 nm and 130 nm, where both CMOS technologies have produced uniqueness, uniformity, and bit-aliasing values close to the ideal 50%; as well as SVM prediction accuracies no higher than 52.3%, therefore indicating excellent PUF performance.

Original languageEnglish
Pages (from-to)74-82
Number of pages9
JournalBulletin of Electrical Engineering and Informatics
Issue number1
Publication statusPublished - Mar 2019

All Science Journal Classification (ASJC) codes

  • Computer Science (miscellaneous)
  • Control and Systems Engineering
  • Information Systems
  • Instrumentation
  • Hardware and Architecture
  • Computer Networks and Communications
  • Control and Optimization
  • Electrical and Electronic Engineering

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