Characterization and optimizations of silicide thickness in 45nm pMOS device

F. Salehuddin, Ibrahim Ahmad, Fazrena Azlee Hamid, A. Zaharim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

The characteristics of high performance 45nm pMOS devices based on International Technology Roadmap for Semiconductor (ITRS) have been studied using ATHENA and ATLAS's simulator. There are four factors were varied for 3 levels to perform 9 experiments. The factors are halo implantation, Source/Drain (S/D) implantation, oxide growth temperature and silicide anneal temperature. In this paper, Taguchi Method was used to analyze the experimental data in order to get the optimum solutions for these factors. The silicide on the poly-Si gate electrode has been used to reduce the gate electrode resistance. The result shows that the threshold voltage (VTH) value is -0.1501 Volts. The value is exactly same with ITRS prediction. This shows that Taguchi Method is a very useful tool to predict the optimum solution in finding the 45nm pMOS fabrication recipes with appropriate VTH value. The result also shows that the average of silicide thickness after optimizations approaches is 30.12nm.

Original languageEnglish
Title of host publication2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2010 - Proceedings
Pages300-304
Number of pages5
DOIs
Publication statusPublished - 11 Aug 2010
Event2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA2010 - Kuala Lumpur, Malaysia
Duration: 12 Apr 201013 Apr 2010

Publication series

Name2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2010 - Proceedings

Other

Other2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA2010
CountryMalaysia
CityKuala Lumpur
Period12/04/1013/04/10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Salehuddin, F., Ahmad, I., Hamid, F. A., & Zaharim, A. (2010). Characterization and optimizations of silicide thickness in 45nm pMOS device. In 2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2010 - Proceedings (pp. 300-304). [5503054] (2010 International Conference on Electronic Devices, Systems and Applications, ICEDSA 2010 - Proceedings). https://doi.org/10.1109/ICEDSA.2010.5503054